As a result, this trend is driving the need for engineers to integrate multiple heterogeneous technologies in a single product, affecting the performance and functionality of ICs and introducing a new set of challenges for semiconductor companies. Given the complexity of today's chips, packages and boards, ICs based on both silicon and non-silicon materials are now required to design optimal high-performance systems. Until now, advances in silicon technology have been sufficient for continued improvement in microelectronics products. This higher level of integration enables engineers to design concurrently across the chip, package and board.īy automating what has until now been a manual process, the Virtuoso System Design Platform minimizes errors and can reduce layout versus schematic (LVS) time between IC and package from days to minutes. has launched Cadence IC6.1.7 ISR22 Virtuoso, a formal, streamlined and automated co-design and verification flow between the Cadence Virtuoso platform and Allegro and Sigrity technologies.
